Another field of intellectual property protection is the protection of semiconductor integrated circuit layout designs.
The layout design of semiconductor integrated circuits is often the result of significant investments in both time from highly skilled experts and financial resources. There is a constant demand for innovative layout designs to reduce the size of existing integrated circuits and improve their functionality. Smaller layout designs require less material for production and less physical space for housing. Layout designs are used in a wide range of products, including everyday household items like watches, video cameras, washing machines, automobiles, etc., as well as other complex data processing devices.
While creating new layout designs for semiconductor integrated circuits may require substantial investment, copying these layout designs represents only a small fraction of that investment. Copying can be accomplished by capturing each layer of the integrated circuit and preparing containers for production based on the captured images. The potential for copying is the primary reason for the application of legal regulations regarding the protection of layout designs.
According to the TRIPS Agreement of the World Trade Organization (WTO), the minimum term of protection for layout designs is 10 years from the date of filing or from the first commercial exploitation worldwide. However, members may provide for a term of protection of 15 years from the date of the creation of the layout design.
